Faculty Profiles - INOUE Toshiyuki

Papers - INOUE Toshiyuki

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A 16-Channel Optical Receiver Circuit for a Multicore Fiber-Based Co-Packaged Optics Module in a 65-nm CMOS Chip Reviewed International journal

T. Inoue, A. Tsuchiya, K. Kishine, Y. Takahashi, D. Ito, and M. Nakamura

IEEE Transactions on Circuits and Systems II: Express Briefs 71 ( 5 ) 2514 - 2518 2024.3

A burst-mode receiver with quick response and high consecutive identical digit tolerance for advanced intra-vehicle optical networks Reviewed International journal

Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Daisuke Ito, Yasuhiro Takahashi, and Makoto Nakamura

Microelectronics Journal 145 106120 2024.3

Delay Circuit Design for Differential Detection in Intra- Vehicle Optical Networks Invited Reviewed International journal

T. Inoue, A. Tsuchiya, K. Kishine, D Ito, Y. Takahashi, and M. Nakamura

2025 IEEE the 14th International Conference on Communications, Circuits, and Systems (ICCCAS 2025) 2025.5

A Small-Area and Low-EPB Inductive-Peaking VCSEL Driver for a 65-nm CMOS Chip Reviewed International journal

T. Inoue, A. Tsuchiya, K. Kishine, D. Ito, Y. Takahashi, and M. Nakamura

2024 IEEE 37th International System-on-Chip Conference (SOCC) 2024.9

A 25-Gb/s Active Feedback Transimpedance Amplifier in 65-nm CMOS Reviewed

Yasuhiro Takahashi, Daisuke Ito, Makoto Nakamura, Akira Tsuchiya, Toshiyuki Inoue, and Keiji Kishine

2024 International Conference on Electronics, Information, and Communication (ICEIC) 2024.3

4-ch 25-Gb/s Small and Low-power VCSEL Driver Circuit with Unbalanced CML in 65-nm CMOS Reviewed

D. Ito, Y. Takahashi, M. Nakamura, T. Inoue, A. Tsuchiya, and K. Kishine

2023 20th International SoC Design Conference (ISOCC) 13 - 14 2024.1

High-Speed, Low-Power, and Small-Area Optical Receiver in 65-nm CMOS Invited Reviewed

A. Tsuchiya, T. Inoue, K. Kishine, D. Ito, Y. Takahashi, and M. Nakamura

2023 IEEE 15th International Conference on ASIC (ASICON) 1 - 2 2024.1

A 4×32-Gb/s VCSEL Driver with Adaptive Feedforward Equalization in 65-nm CMOS Reviewed

T. Inoue, A. Tsuchiya, K. Kishine, D. Ito, Y. Takahashi, and M. Nakamura

2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS) 1 - 4 2024.1

Low-power and Small-area 4-ch 25-Gb/s Transimpedance Amplifiers in 65-nm CMOS Process Reviewed

Yasuhiro Takahashi, Daisuke Ito, Makoto Nakamura, Akira Tsuchiya, Toshiyuki Inoue, Keiji Kishine

IEICE Electronics Express 20 ( 18 ) 1 - 6 2023.9

10 Gb/s burst-mode driver circuit with on-chip bias switch for in-vehicle optical networks Reviewed International journal

Daisuke Ito, Yasuhiro Takahashi, Makoto Nakamura, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine

IEICE Electronics Express 20 ( 12 ) 2023.7

Burst-mode driver circuit with on-chip bias tee for in-Vehicle optical networks Reviewed International journal

Daisuke Ito, Yasuhuiro Takahashi, Makoto Nakamura, Toshiyuki Inoue, Akira Tsuchiya, and Keiji Kishine

2022 International Conference on Analog VLSI Circuits (AVIC) 2022.11

A Burst-Mode TIA with Automatic Power Saving and DC Wander Reduction in 65-nm CMOS Reviewed

Inoue T., Tsuchiya A., Kishine K., Ito D., Takahashi Y., Nakamura M.

ICECS 2022 - 29th IEEE International Conference on Electronics, Circuits and Systems, Proceedings 2022.10

Language：English Publishing type：Research paper (international conference proceedings) Publisher：ICECS 2022 - 29th IEEE International Conference on Electronics, Circuits and Systems, Proceedings Participation form：Joint(The main charge)

A burst-mode transimpedance amplifier (TIA) receives burst signals, which are intermittent signals. To reduce the power consumption during the idle times, we propose a burst-mode TIA with automatic power saving in 65-nm CMOS. It enables to provide a stable operation without a DC wander effect while receiving the burst signal. The post-layout simulation results show that the designed TIA can automatically reduce the power consumption during the idle times by 54.2% compared to that during the active times.

DOI： 10.1109/ICECS202256217.2022.9970848

Scopus

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A Fine-Tuning Phase Shifter with Vector Synthesizer Using 65-nm CMOS for Beamforming in 24-GHz Band Reviewed International journal

Inoue M., Nakashioya S., Inoue T., Tsuchiya A., Kishine K.

ICECS 2022 - 29th IEEE International Conference on Electronics, Circuits and Systems, Proceedings 2022.10

Language：English Publishing type：Research paper (scientific journal) Publisher：ICECS 2022 - 29th IEEE International Conference on Electronics, Circuits and Systems, Proceedings Participation form：Joint(The vice charge)

Recently, radio-wave sensors have been utilized in automotive radar and biological sensing applications. Although beamforming using an array antenna is effective method for changing the radiation directivity, the phase-shift error causes degradation of the directivity significantly. In this paper, we propose a fine-tuning phase shifter with a vector synthesizer, which enables to control the phase-shift amount continuously in 24-GHz band. From the measurement results of the fabricated phase shifter using 65-nm CMOS technology, the variable phase-shift amount over a range of 360◦ is obtained continuously. In addition, the estimated radiation patterns show that the phase-shift and amplitude errors of the fabricated phase shifter are acceptable.

DOI： 10.1109/ICECS202256217.2022.9970921

Scopus

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A Method for Implementing LSTM-Based Multiple-People Identification System for Non-Contact Health Monitoring on Small-Scale FPGA Reviewed International journal

Okamoto M., Inoue T., Tsuchiya A., Kishine K.

Proceedings - International SoC Design Conference 2022, ISOCC 2022 55 - 56 2022.10

Language：English Publishing type：Research paper (scientific journal) Publisher：Proceedings - International SoC Design Conference 2022, ISOCC 2022 Participation form：Joint(The vice charge)

We propose a method for implementing an LSTM-based multiple-people identification system on a small-scale FPGA. To reduce the hardware-resource usage, we introduce a digit adjustment and bit reduction method for converting the floating-point type to the fixed-point type with high precision. It enables not only to reduce the hardware-resource usage without degrading the identification accuracy but also to shorten the computation time by 50% compared to that of the conventional floating-point type.

DOI： 10.1109/ISOCC56007.2022.10031374

Scopus

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Smart Computational Resource Distribution System with Automatic Classification Interface for CPS Reviewed International journal

Teramura Y., Inoue T., Tsuchiya A., Kishine K.

Proceedings - International SoC Design Conference 2022, ISOCC 2022 101 - 102 2022.10

Language：English Publishing type：Research paper (scientific journal) Publisher：Proceedings - International SoC Design Conference 2022, ISOCC 2022 Participation form：Joint(The vice charge)

This paper describes a proposal for a classification interface for computational resources distribution in CPS. The classification interface enables to distribute processing to the different computational resources (CPU and FPGA) automatically depending on the type of the processing. As a result, the total processing time is shortened by 50.9% compared to that of the system without the classification interface.

DOI： 10.1109/ISOCC56007.2022.10031427

Scopus

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Memory-Access Optimization for Acceleration and Power Saving of FPGA-Based Image Processing Reviewed International journal

Shimohane S., Inoue T., Tsuchiya A., Kishine K.

Proceedings - International SoC Design Conference 2022, ISOCC 2022 338 - 339 2022.10

Language：English Publishing type：Research paper (scientific journal) Publisher：Proceedings - International SoC Design Conference 2022, ISOCC 2022 Participation form：Joint(The vice charge)

In this paper, we propose a method for acceleration and power saving of FPGA-based image processing by optimizing memory access. The BRAM-based System can improve the datatransmission speed between the FPGA and memory device by storing the image-processed data in BRAM. Also, it does not require an additional driver to absorb the latency, which leads to reducing the hardware-resource usage and the power consumption. Our memory-access optimization enables that the processing speed is increased by about 9 times and the power consumption is reduced by 10% compared to that of the conventional DRAMbased system.

DOI： 10.1109/ISOCC56007.2022.10031293

Scopus

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A Small-Area Integration of Optical Receiver Using Multi-Layer Inductors and Capacitor-Under-Pad Reviewed International journal

A. Tsuchiya, T. Inoue, K. Kishine, Y. Takahashi, D. Ito and M. Nakamura

2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS) 2022.8

A 28-Gb/s VCSEL Driver with Variable Output Impedance in 65-nm CMOS, Fukuoka, Japan, 2022, pp. 1-4, Reviewed International journal

T. Inoue, A. Tsuchiya, K. Kishine, D. Ito, Y. Takahashi and M. Nakamura,

2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS) 2022.8

Low-Power Regulated Cascode CMOS Transimpedance Amplifier with Local Feedback Circuit Reviewed

Y. Takahashi, D. Ito, M. Nakamura, A. Tsuchiya, T. Inoue, and K. Kishine

Electronics 11 ( 6 ) 2022.3

Language：English Publishing type：Research paper (scientific journal) Publisher：MDPI Participation form：Joint(The vice charge)

In this paper, we propose a multistage transimpedance amplifier (TIA) based on the local negative feedback technique. Compared with the conventional global-feedback technique, the proposed TIA has the advantages of a wider bandwidth, and lower power dissipation. The schematic and characteristics of the proposed TIA circuit are described. Moreover, the proposed TIA employs inductive peaking to increase bandwidth. The TIA is implemented using a 65 nm complementary metal oxide semiconductor (CMOS) technology and consumes 23.9 mW with a supply voltage of 1.0 V. Using a back-annotated simulation, we obtained the following characteristics: a gain of 46 dBΩ and −3 dB frequency of 11.4 GHz. TIA occupies an area of 366 µm × 225 µm.

DOI： 10.3390/electronics11060854

Scopus

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Process Acceleration for HEVC Using Parallel Characteristics Calculation and Pixel Array Conversion Reviewed International journal

R. Yamazaki, Y. Teramura, T. Inoue, A. Tsuchiya, and K. Kishine

International Conference on Electronics, Information, and Communication (ICEIC) 2022 2022.2

Capacitor Under Pad for Small Area Integration of High-Speed Signal-to-Differential Amplifier Reviewed International journal

A. Tsuchiya, T. Inoue, K. Kishine, Y. Takahashi, D. Ito, and M. Nakamura

International Conference on Electronics, Information, and Communication (ICEIC) 2022 2022.2

Method of Estimating Positions for Multiple People in Non-Contact Vital Signs Monitoring Systems Reviewed International journal

M. Kashiwagi, T. Inoue, M. Okamoto, A. Tsuchiya, and K. Kishine

International Conference on Electronics, Information, and Communication (ICEIC) 2022 2022.2

A preamplifier circuit with offset-voltage control technique for 50-Gb/s CMOS PAM4 receiver Reviewed International journal

M. Miyabe, T. Inoue, M. Inoue, S. Nakashioya, A. Tsuchiya, and K. Kishine

2022 International Conference on Electronics, Information, and Communication (ICEIC) 2022.2

A Burst-Mode TIA with Adaptive Response and Stable Operation for in-Vehicle Optical Networks Reviewed International journal

T. Inoue, A. Tsuchiya, K. Kishine, D. Ito, Y. Takahashi, and M. Nakamura

2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) 2021.11

A method for accelerating the inference process of FPGA-based LSTM for biometric systems Reviewed International journal

U. Yoshimura, T. Inoue, A. Tsuchiya, and K. Kishine

IEIE Transactions on Smart Processing and Computing 10 ( 5 ) 416 - 423 2021.10

Dynamic Memory Access Control for Accelerating FPGA-based Image Processing Reviewed International journal

K. Nishiguchi, T. Inoue, R. Yamazaki, K. Ogohara, A. Tsuchiya, and K. Kishine

Journal of Semiconductor Technology and Science 21 ( 1 ) 29 - 38 2021.2

5-Gb/s PAM4 Transmitter IC Using Compensation Circuit in an 180-nm CMOS Reviewed

Ichii Y., Inoue T., Tsuchiya A., Kishine K.

2021 International Conference on Electronics, Information, and Communication, ICEIC 2021 2021.1

Language：English Publishing type：Research paper (scientific journal) Publisher：2021 International Conference on Electronics, Information, and Communication, ICEIC 2021

This paper proposes a 5-Gb/s four-level pulse amplitude modulation (PAM4) transmitter using compensation circuit in data transmission systems. In PAM4 systems, the signal amplitude requires smaller rising and falling times. To achieve this, we adopted an analog feed forward equalizing (FFE) for the compensation in PAM4 transmitter. To confirm the advantage of the proposed technique, we fabricated a 5-Gb/s PAM4 transmitter IC in an 180-nm CMOS process for this work. The measured rising and falling times were 18% and 13% smaller than those without FFE, respectively.

DOI： 10.1109/ICEIC51217.2021.9369819

Scopus

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Implementation of Low-Energy LSTM with Parallel and Pipelined Algorithm in Small-Scale FPGA Reviewed

Yoshimura U., Inoue T., Tsuchiya A., Kishine K.

2021 International Conference on Electronics, Information, and Communication, ICEIC 2021 2021.1

Language：English Publishing type：Research paper (scientific journal) Publisher：2021 International Conference on Electronics, Information, and Communication, ICEIC 2021

Regression and classification are necessary for biometric systems and carried out using machine learning. A method for regression and classification is long short-term memory (LSTM). We proposed and implemented algorithms for low-energy LSTM for the regression of microwave-sensor signals into a small-scale FPGA. We found that our FPGA-based parallel (including unrolled)-pipelined algorithm decreased the computation time by 95% compared with the FPGA-based sequential algorithm. In addition, the amount of energy consumption with the proposed algorithm was reduced by 92% and 91% compared with that with a high-end GPU and CPU, respectively.

DOI： 10.1109/ICEIC51217.2021.9369806

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Supply Noise Reduction Filter for Parallel Integrated Transimpedance Amplifiers Reviewed

Tanimura S., Tsuchiya A., Inoue T., Kishine K.

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC 15 - 16 2021.1

Language：English Publishing type：Research paper (international conference proceedings) Publisher：Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

© 2021 Association for Computing Machinery. This paper presents a supply noise reduction in transimpedance amplifier (TIA) for optical interconnection. TIAs integrated in parallel suffer from inter-channel interference via the supply and the ground lines. We employ an RC filter to reduce the supply noise. The filter is inserted to the first stage of TIA and does not need extra power. The proposed circuit was fabricated in an 180-nm CMOS. The measurement results verify 38% noise reduction at 5 Gbps operation.

DOI： 10.1145/3394885.3431646

Scopus

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Processing Time Reduction for JPEG Compression Using Pixel Array Conversion Reviewed International journal

R. Yamazaki, T. Inoue, A. Tsuchiya, and K. Kishine

2020 International SoC Design Conference (ISOCC) 2020.10

Design of On-Chip Multi-layered Inductor for Area-Efficient Inductive Peaking Reviewed International journal

A. Tsuchiya, T. Inoue, and K. Kishine

2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) 2020.9

Design method for active-shunt-feedback type inductorless low-noise amplifiers in 65-nm CMOS Reviewed International journal

T. Inoue, A. Tsuchiya, and K. Kishine

Journal of Semiconductor Technology and Science 20 ( 2 ) 177 - 186 2020.4

Language：English Publishing type：Research paper (scientific journal) Publisher：Journal of Semiconductor Technology and Science Participation form：Joint(The main charge)

© 2020, Institute of Electronics Engineers of Korea. All rights reserved. We demonstrated low-power and compact active-shunt-feedback type inductorless low-noise amplifiers (LNAs) in 65-nm CMOS. We pointed out the importance of considering an intermediate-node voltage in the LNA, and proposed a design method focusing on the intermediate voltage. The influence of the intermediate voltage upon the gain and noise figure was examined by a circuit simulator, and it was clarified that the intermediate voltage of VDD/2 was appropriate for high gain and low noise figure. Based on the proposed method, the active-shunt-feedback type LNA was fabricated in a 65-nm CMOS chip. The figure-of-merit considering the power, gain, band-width, noise factor, and linearity improved by 6 in comparison with that of the conventional 0.13-mm CMOS type.

DOI： 10.5573/JSTS.2020.20.2.177

Scopus

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Capacitive sensor for contact angle estimation of droplet on microfluidic chip Reviewed International journal

A. Tsuchiya, T. Inoue, and K. Kishine

2019 IEEE Asia-Pacific Microwave Conference (APMC) 2019.12

Frequency discriminator using a simple AD converter for interface systems Reviewed International journal

S. Kimura, A. Imajo, T. Inoue, A. Tsuchiya, and K. Kishine

2019 International SoC Design Conference (ISOCC) 2019.10

Optimization technique of memory traffic for FPGA-based image processing system Reviewed International journal

K. Nishiguchi, T. Inoue, A. Tsuchiya, K. Ogohara, and K. Kishine

2019 International SoC Design Conference (ISOCC) 2019.10

Suitable-compensation circuit design for a PAM4 transmitter in 180-nm CMOS Reviewed International journal

Y. Ichii, R. Noguchi, T. Inoue, A. Tsuchiya, and K. Kishine

2019 International SoC Design Conference (ISOCC) 2019.10

Design of crosstalk noise filter for multi-channel transimpedance amplifier Reviewed International journal

S. Tanimura, A. Tsuchiya, R. Noguchi, T. Inoue, and K. Kishine

2019 32nd IEEE International System-on-Chip Conference (SOCC) 161 - 164 2019.9

Impact of on-chip inductor and power-delivery-network stacking on signal and power integrity Reviewed International journal

A. Tsuchiya, A. Hiratsuka, T. Inoue, K. Kishine, and H. Onodera

IEICE Transactions on Electronics E102-C ( 7 ) 573 - 579 2019.7

FPGA-based binary labeling signal transmission system Reviewed International journal

T. Inoue, K. Nomura, R. Noguchi, N. Koda, A. Tsuchiya, K. Kishine

Journal of Semiconductor Technology and Science 19 ( 3 ) 276 - 286 2019.6

Language：English Publishing type：Research paper (scientific journal) Publisher：The Institute of Electronics and Information Engineers Participation form：Joint(The main charge)

© 2019, Institute of Electronics Engineers of Korea. All rights reserved. We implemented and evaluated our newly developed binary labeling signal transmission system using field-programmable gate arrays. In this system, the state of “0” or “1” of labeling signals is related to modulation or non-modulation of frame signals, and the labeling signals can be multiplexed to frame signals and transmitted without changing the configuration of the original frame signal. We designed a modulation-system protocol for implementing the above system and propose a digital smoothing technique for stabilizing a phase-locked loop circuit. We verified that our digital smoothing technique prevents bit error of the modulated frame signals in the implemented transmitter. The labeling signal multiplexed to the frame signals is demodulated without bit error in the implemented transceiver.

DOI： 10.5573/JSTS.2019.19.3.276

Scopus

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A 25-Gb/s low-power clock and data recovery with an active-stabilizing CML-CMOS conversion Reviewed International journal

R. Noguchi, A. Imajo, T. Inoue, A. Tsuchiya, and K. Kishine

The 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2018) 49 - 52 2018.12

Low-power and high-linearity inductorless low-noise amplifiers with active-shunt-feedback in 65-nm CMOS technology Reviewed International journal

T. Inoue, R. Noguchi, A. Tsuchiya, K. Kishine, H. Onodera

The 61st IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2018) 751 - 754 2018.8

Millimeter-wave band optical single-sideband modulator using array-antenna-electrodes and polarization-reversed structures with asymmetric Mach-Zehnder waveguide Reviewed International journal

Y. Matsukawa, T. Inoue, H. Murata, A. Sanada

Japanese Journal of Applied Physics 57 ( 8S2 ) 08PB04 2018.8

Impact of on-chip multi-layered inductor on signal and power integrity of underlying power-ground net Reviewed International journal

A. Tsuchiya, A. Hiratsuka, T. Inoue, K. Kishine and H. Onodera

The 22nd IEEE Workshop on Signal and Power Integrity (SPI 2018) 2018.5

A 25-Gb/s 13 mW Clock and Data Recovery Using C2MOS D-Flip-Flop in 65-nm CMOS Reviewed International journal

R. Noguchi, K. Furuichi, H. Uemura, T. Inoue, A. Tsuchiya, K Kishine, H. Katsurai, S. Nakamoto and M. Nakamura

The 2018 International Symposium on VLSI Design, Automation and Test (2018 VLSI-DAT) 2018.4

60 GHz band optical single-sideband modulator using polarization-reversed structures with asymmetric Mach-Zehnder optical waveguide Reviewed International journal

Y. Matsukawa, T. Inoue, H. Murata and A. Sanada

The 22nd Microoptics Conference (MOC’17) 2017.11

Design Method for Inductorless Low-Noise Amplifiers with Active Shunt-Feedback in 65-nm CMOS Reviewed International journal

T. Inoue, A. Tsuchiya, K. Kishine, M. Nakamura

The 14th International SoC Design Conference (ISOCC 2017) 2017.11

FPGA-Based Transceiver Circuit for Labeling Signal Transmission System Reviewed International journal

K. Nomura, N. Koda, T. Inoue, A. Tsuchiya, K. Kishine

The 14th International SoC Design Conference (ISOCC 2017) 2017.11

Compact Implement IIR Filter on FPGA for Noise Reduction of Sensor Signal Reviewed International journal

K. Arauchi, S. Maki, T. Inoue, A. Tsuchiya, K. Kishine

The 14th International SoC Design Conference (ISOCC 2017) 2017.11

Electro-optic spatial light modulator/deflector using multi-stage polarization-reversed structure Reviewed International journal

Y. Hayashi, T. Inoue, H. Murata, A. Sanada, M. Okazaki, M. Ishino and K. Yamamoto

The 22nd Microoptics Conference (MOC’17) 2017.11

Wireless-optical signal converter utilizing stacked-patch antennas and electro-optic substrates Reviewed International journal

H. Murata, H. Aya, T. Inoue, A. Sanada, Y.N. Wijayanto, A. Kanno, and T. Kawanishi

The 5th ENRI International Workshop on ATM and CNS 2017.11

Millimeter-wave electro-optic modulator using stacked patch-antennas embedded with micrometer-gap for radio-over-fiber system Reviewed International journal

H. Murata, H. Aya, T. Inoue, A. Sanada, Y.N. Wijayanto, A. Kanno, T. Kawanishi

The 47th European Microwave Conference (EuMC2017) 2017.10

Millimeter-wave-band array-antenna-electrode electro-optic modulator for orthogonal polarization operation Reviewed International journal

T. Inoue, S. Ueda, H. Murata and A. Sanada

2017 IEEE Photonics Conference 2017.10

Millimeter-wave-band optical single-sideband modulator using array-antenna-electrode and polarization-reversed structures Reviewed International journal

Y. Matsukawa, T. Inoue, H. Murata and A. Sanada

CLEO-PR, OECC and PGC 2017 2017.7

Electro-Optic Bragg Diffraction Type Spatial Light Modulator Using Periodically Poled Structures for Laser Displays Reviewed International journal

Y. Hayashi, T. Inoue, H. Murata, A. Sanada

The Laser Display and Lighting Conference 2017 (LDC2017) 2017.4

Array-antenna-electrode electro-optic modulators for millimeter-wave radio-over-fiber systems Reviewed International journal

H. Murata, T. Inoue, Y. Matsukawa, H. Aya, T. Ikeda and Y. Okamura

SPIE Photonics West 2017 2017.2

Millimeter-Wave Wireless Signal Generation and Detection Using Photonic Technique for Mobile Communication Systems Reviewed International journal

T. Inoue, K. Ikeda, Y. Kakubari, N. Yonemoto, N. Shibagaki, H. Toda and H. Murata

2016 IEEE International Topical Meeting on Microwave Photonics (MWP) 2016.11

Wireless Millimeter-Wave-Lightwave Signal Converter Using Stacked Patch-Antennas Embedded with a Micrometer-Gap and Electro-Optic Crystal Reviewed International journal

H. Aya, T. Inoue, H. Murata ,Y. Okamura, Y.N. Wijayanto, A. Kanno and T. Kawanishi

The 2016 International Conference on Radar, Antenna, Microwave, Electronics and Telecommunications (ICRAMET) 2016.10

Wireless data transfer in 60 GHz-band using array-antenna-electrode electro-optic modulator Reviewed International journal

T. Inoue, T. Ikeda, H. Murata and Y. Okamura

2016 IEEE Photonics Conference, 29th Annual Conference of the IEEE Photonics Society 2016.10

Array-Antenna-Electrode Optical Modulator Operating in Millimeter-Wave Frequency Band Reviewed International journal

H. Murata, T. Inoue, T. Ikeda and Y. Okamura

2016 IEEE Conference on Antenna Measurements & Applications (CAMA) 2016.10

Optical single-sideband modulator using array-antenna-electrode and polarization-reversed structures Reviewed International journal

H. Murata, Y. Matsukawa, T. Inoue and Y. Okamura

The 21st Microoptics Conference (MOC '16) 2016.10

Beam forming characteristics of antenna-coupled-electrode electro-optic modulators operating in millimeter-wave bands Invited Reviewed International journal

H. Murata, T. Inoue, H. Shiomi and Y. Okamura

2016 URSI Asia-Pacific Radio Science Conference (URSI AP-RASC 2016) 2016.8

Array-Antenna-Electrode Electro-Optic Modulator for Millimeter-Wireless Communication Systems Reviewed International journal

H. Murata; T. Inoue; T. Ikeda; H. Shiomi and Y. Okamura

2016 IEEE Sixth International Conference on Communications and Electronics (IEEE ICCE 2016). 2016.7

Array-antenna-electrode electro-optic modulator for next-generation millimeter-wave wireless links Reviewed International journal

T. Inoue, H. Murata and Y. Okamura

The 20th Microoptics Conference (MOC’15) 2015.10

Electro-optic polarization conversion type modulator using domain-inverted 8 mol% MgO doped congruent LiTaO₃ Reviewed International journal

T. Inoue and T. Suhara

The 20th Microoptics Conference (MOC’15) 2015.10

Array-antenna-electrode electro-optic modulators for millimeter-wave up-links in wireless communication systems Reviewed International journal

H. Murata, T. Inoue, N. Kohmu, T. Ikeda, H. Shiomi and Y. Okamura

2015 IEEE International Topical Meeting on Microwave Photonics (MWP2015) 2015.10

Electro-optic polarization conversion type modulator using periodically poled 8 mol% MgO doped congruent LiTaO₃ Reviewed International journal

T. Inoue, D. Kuwamura and T. Suhara

Applied Physics Express 8 ( 6 ) 062601 2015.5

強誘電体周期分極反転構造を用いた電気光学変調器に関する研究

井上　敏之

2015.3

High-performance electro-optic polarisation conversion type modulator for short-wavelength light using periodically poled MgO:LiNbO₃ Reviewed International journal

T. Inoue and T. Suhara

Electronics Letters 50 ( 22 ) 1622 - 1624 2014.10

Fabrication of MgO:LiNbO₃ domain inverted structures with short period and application to electro-optic Bragg deflection modulator Reviewed International journal

T. Inoue and T. Suhara

IEICE Transactions on Electronics E97-C ( 7 ) 744 - 748 2014.7

High performance electro-optic polarization conversion type modulator for short-wavelength light using periodically poled MgO:LiNbO₃ Reviewed International journal

T. Inoue and T. Suhara

The 17th European Conference on Integrated Optics and the 19th MicroOptics Conference (ECIO-MOC 2014) 2014.6

Electro-optic polarization conversion type modulator for short-wavelength light using periodically poled MgO:LiNbO₃ Reviewed International journal

T. Inoue and T. Suhara

The 18th Microoptics Conference (MOC’13) 2013.10

Fabrication of MgO:LiNbO₃ domain inverted structures with short period and application to electro-optic Bragg deflection modulator Reviewed International journal

T. Inoue and T. Suhara

The 10th Conference on Lasers and Electro-Optics Pacific Rim, and the 18th OptoElectronics and Communications Conference/Photonics in Switching 2013 (CLEO-PR & OECC/PS 2013) 2013.7

MgO:LiNbO₃周期分極反転構造電気光学ブラッグ偏向型一次元空間光変調器 Reviewed

井上敏之, 栖原敏明

電子情報通信学会論文誌C J96-C ( 4 ) 47 - 54 2013.4

Electrooptic Bragg deflection modulator for UV laser light using periodically poled MgO:s-LiTaO₃ Reviewed International journal

M. Okazaki, T. Chichibu, S. Yoshimoto, T. Inoue and T. Suhara

IEEE Photonics Technology Letters 23 ( 22 ) 1709 - 1711 2011.11

Electro-optic Bragg deflection modulator using periodically poled MgO:LiNbO₃ Reviewed International journal

T. Inoue, T. Suhara and M. Okazaki

The 17th Microoptics Conference (MOC’11) 2011.11

MgO:LiNbO₃ waveguide SHG device with domain-inverted grating formed by 2-Step voltage application under UV light Reviewed International journal

M. Fujimura, E. Kitado, T. Inoue and T. Suhara

The 17th Microoptics Conference (MOC’11) 2011.11

Electro-optic Bragg deflection modulator for UV laser light using periodically poled MgO:s-LiTaO₃ Reviewed International journal

M. Okazaki, T. Chichibu, S. Yoshimoto, T. Inoue and T. Suhara

The 17th Microoptics Conference (MOC’11) 2011.11

Electrooptic Bragg deflection modulator using periodically poled MgO:LiNbO₃ Reviewed International journal

T. Inoue and T. Suhara

IEEE Photonics Technology Letters 23 ( 17 ) 1252 - 1254 2011.9

MgO:LiNbO₃ waveguide second-harmonic generation devices with domain-inverted gratings formed by 2-step voltage application under UV light Reviewed International journal

M. Fujimura, E. Kitado, T. Inoue and T. Suhara

The 2011 International Conference on Solid State Devices and Materials (SSDM 2011) 2011.9

MgO:LiNbO₃ waveguide quasi-phase-matched second-harmonic generation devices fabricated by two-step voltage application under UV light Reviewed International journal

M. Fujimura, E. Kitado, T. Inoue and T. Suhara

IEEE Photonics Technology Letters 23 ( 18 ) 1313 - 1315 2011.9

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