Faculty Profiles - TSUCHIYA Akira

Papers - TSUCHIYA Akira

Division display161 - 174 of about 174／ All the affair displays >>

オンチップ伝送線路のリターン電流分布が信号波形に与える影響 — 平衡・不平衡伝送の比較 — Reviewed

土谷亮, 橋本昌宜, 小野寺秀俊

第17回回路とシステム軽井沢ワークショップ, pp.567-572, Apr 2004. 2004

Representative Frequency for Interconnect R(f)L(f)C Extraction Reviewed

A. Tsuchiya, M. Hashimoto, H. Onodera

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E86-A ( 12 ) 2942 - 2951 2003.12

Representative frequency for interconnect R(f)L(f)C extraction Reviewed

A Tsuchiya, M Hashimoto, H Onodera

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E86A ( 12 ) 2942 - 2951 2003.12

Language：English Publishing type：Research paper (scientific journal) Publisher：IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG

This paper discusses the frequency to extract RLC values from interconnects. In circuit design, frequency-independent equivalent circuit is widely used, and many design and analysis techniques based on this equivalent circuit are proposed so far. However in reality, characteristics of interconnects are frequency-dependent. Also pulse waveforms in digital circuits contain multiple frequency components. The frequency used for RLC extraction affects the accuracy of interconnect characterization, and hence careful determination of extraction frequency is critical. We propose a representative frequency for RLC extraction. Conventionally, representative frequencies are determined by input pulse. The proposed method decides the representative frequency based on the interconnect length, whereas conventional representative frequencies are determined by input pulse shape, period and patterns. We verify that the extraction at the proposed frequency provides the most accurate transition waveform against various input signals and interconnect structures in digital circuits.

DOI： 10.1093/ietfec/e88-a.4.885

Web of Science

周辺配線の影響を考慮したオンチップ高速信号伝送用配線構造

土谷亮

2003.3

周辺配線の影響を考慮したオンチップ高速信号伝送用配線構造 Reviewed

土谷亮

京都大学 2003.2

Frequency Determination for Interconnect RLC Extraction Reviewed

Akira Tsuchiya, Masanori Hashimoto, Hidetoshi Onodera

11th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2003), pp.288-293, Apr 2003. 2003

直交配線を持つオンチップ伝送線路の特性評価 Reviewed

土谷亮, 橋本昌宜, 小野寺秀俊

DA シンポジウム 2003, pp.133-138, Jul 2003. 2003

配線R(f)L(f)C抽出のための代表周波数決定手法 Reviewed

土谷亮, 橋本昌宜, 小野寺秀俊

第16回回路とシステム軽井沢ワークショップ, pp.61-66, Apr 2003. 2003

VLSI 配線の伝送線路特性を考慮した駆動力決定手法 Reviewed

土谷亮, 橋本昌宜, 小野寺秀俊

情報処理学会論文誌 43 ( 5 ) 1338 - 1347 2002.5

Interconnect Structures for High-Speed Long-Distance Signal Transmission Reviewed

M. Hashimoto, D. Hiramatsu, A. Tsuchiya, H. Onodera

15th Annual IEEE International ASIC/SOC Conference, pp. 426--430, Sep 2002. 2002

VLSI配線の伝送線路特性を考慮した駆動力決定手法 Reviewed

土谷亮, 橋本昌宜, 小野寺秀俊

情報処理学会論文誌 2002

長距離高速信号伝送を可能にするVLSI配線構造の検討 Reviewed

平松大輔, 土谷亮, 橋本昌宜, 小野寺秀俊

DA シンポジウム 2002, pp.155-160, Jul 2002. 2002

Driver Sizing for High-Performance Interconnects Considering Transmission-Line Effects Reviewed

Akira Tsuchiya, Masanori Hashimoto, Hidetoshi Onodera

10th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2001), pp.377-381, Oct 2001. 2001

VLSI配線の伝送線路化を考慮した駆動力決定手法 Reviewed

土谷亮, 小野寺秀俊

DA シンポジウム 2001, pp.241-246, Jul 2001. 2001

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